IBM has announced a breakthrough in semiconductor technology by introducing what it says is the world’s first sub-1-nanometer chip, built using a new 0.7nm (7 angstrom) manufacturing process.
The company believes the innovation will help extend chip development beyond the current limits of traditional transistor scaling, opening the door to faster and more energy-efficient computing.
The new prototype chip contains nearly 100 billion transistors on a piece of silicon about the size of a fingernail. That is almost twice the transistor density of IBM’s 2nm chip, which was revealed in 2021. According to IBM, the new design could deliver up to 50 percent higher performance or improve energy efficiency by as much as 70 percent compared to its previous 2nm technology. The company expects these improvements to benefit demanding applications such as generative AI, cloud computing, and future consumer electronics.
At the center of the breakthrough is a completely new transistor architecture called “nanostack.” Unlike today’s nanosheet transistor designs, nanostack arranges transistors vertically in multiple layers, allowing more components to fit into the same space while enabling different materials to be used in each layer for improved performance and power efficiency.
IBM researchers successfully demonstrated the architecture using advanced CMOS integration techniques, dual-channel engineering, and working CMOS inverter circuits, showing that the technology is capable of performing real computing tasks. The company also presented additional research at VLSI 2026, revealing that nanostack can reduce SRAM size by around 40 percent, helping future processors handle the growing memory demands of artificial intelligence workloads.
Although transistor node names no longer directly represent physical dimensions, IBM says its 0.7nm technology proves that semiconductor scaling can continue into the angstrom era, where circuit features approach the size of individual atoms. The company believes its nanostack architecture provides a roadmap for at least another decade of chip scaling.
The development builds on IBM’s long history of semiconductor research, which includes creating the industry’s first 2nm chip. The work is being carried out at IBM’s semiconductor research center in Albany, New York, where a next-generation High Numerical Aperture Extreme Ultraviolet (High NA EUV) lithography system will soon be installed. Developed by ASML, the technology is expected to play a key role in manufacturing future generations of advanced chips. IBM is also collaborating with Lam Research, Tokyo Electron, and SCREEN Semiconductor Solutions to develop High NA EUV manufacturing processes.
If this article helped you, please consider supporting our work. Every small contribution keeps Abijita.com independent and running.
Looking ahead, IBM expects the earliest commercial production of chips based on its nanostack architecture could begin within the next five years. The company believes the breakthrough will lay the foundation for the next generation of high-performance computing, artificial intelligence hardware, and advanced semiconductor technologies.
